Key Responsibilities

• Responsible for the physical implementation from RTL to GDSII of a complex ASIC in advanced CMOS process (22nm and below technologies)

• Work closely with the RTL design team to understand the digital architecture and execute the physical design implementation

• Participate to the definition and development of the physical implementation flow

• Manage floorplan, pin placement, power planning and block/top level assembly

• Participate to define the supply strategy and standard cell choice

• Elaborate timing budget and write power intent (SDC) based on the design information and specification requirement

• Achieve timing and physical closure, including lithography optimizations

• Perform Quality Assurance checks (i.e., DRC, LVS, equivalence, power intent checking)

• Perform Quality of Result checks including signoff timing analysis and power analysis (IR drop, Electromigration checks, power consumption analysis)

• Integrate DFT scan

• Participate to the evaluation of the fabricated ASIC in our measurement lab

• Work in team to successfully design a state-of-the art ASIC

• Participate to design reviews

• Write documentation in accordance with company QA policy

Required Qualifications

• You have a MSc or PhD in Electrical Engineering or equivalent and 10+ years of hands-on experience in physical design of digital IC from RTL to GDSII

• You have knowledge of scripting languages (TCL, Python, Bash, Make, Skill)

• A previous experience with Cadence physical design flow is mandatory

• Experience with the full RTL to GDS2 physical design flow execution (Synthesis, P&R, STA, DFT insertion, DRC and LVS sign-off) with 22nm and below technologies is mandatory.

• An Experience with large designs (>1M gates) with advanced CMOS technologies (22nm and below) and high clock speed (up to 1Ghz) is a plus

• A previous experience in physical implementation of digital processing functions for Mixed-Signal ICs such as A/D Converters, D/A Converters, and/or RF transceivers is a plus

• You demonstrate good analytical and problem-solving skills

• You are a team player with a critical attitude and sense of initiative

• You communicate fluently in English (oral and written)

Required Skills & Technologies

• TCL

• Python

• Bash

• Make

• Skill

• Cadence physical design flow

• RTL to GDS2 physical design flow execution

• Synthesis

• P&R

• STA

• DFT insertion

• DRC

• LVS sign-off

• 22nm and below technologies

• large designs (>1M gates)

• high clock speed (up to 1Ghz)

• physical implementation of digital processing functions for Mixed-Signal ICs

• A/D Converters

• D/A Converters

• RF transceivers